Metrics List & Dependencies:
Technology /Category | Metric/ Feature/Input | Name | Date Type | Format Example | Collectd Release | Collectd Plugin | Description | Dependencies | Limitations | BarometerVerified (Yes/No) | Comments |
| PMU | Metric | L1-dcache-loads | Integer | 23734 | 5.8 | intel_pmu | Level 1 cache for data (L1d) read accesses by a CPU core | jevents from pmu-tools | yes | Dependent on jevents library to read the metric value | |
| PMU | Metric | L1-dcache-load-misses | Integer | 23734 | 5.8 | intel_pmu | Level 1 cache for data (L1d) read misses by a CPU core | jevents from pmu-tools | yes | Dependent on jevents library to read the metric value | |
| PMU | Metric | L1-dcache-stores | Integer | 23734 | 5.8 | intel_pmu | Level 1 cache for data (L1d) writes by a CPU core | jevents from pmu-tools | yes | Dependent on jevents library to read the metric value | |
| PMU | Metric | L1-dcache-store-misses | Integer | 23734 | 5.8 | intel_pmu | Level 1 cache for data (L1d) write misses by a CPU core | jevents from pmu-tools | yes | Dependent on jevents library to read the metric value | |
| PMU | Metric | L1-dcache-prefetches | Integer | 23734 | 5.8 | intel_pmu | Level 1 cache for data (L1d) prefetch accesses by a CPU core | jevents from pmu-tools | yes | Dependent on jevents library to read the metric value | |
| PMU | Metric | L1-dcache-prefetch-misses | Integer | 23734 | 5.8 | intel_pmu | Level 1 cache for data (L1d) prefetch misses by a CPU core | jevents from pmu-tools | yes | Dependent on jevents library to read the metric value | |
| PMU | Metric | L1-icache-loads | Integer | 23734 | 5.8 | intel_pmu | Level 1 cache for instructions (L1i) read accesses by a CPU core | jevents from pmu-tools | yes | Dependent on jevents library to read the metric value | |
| PMU | Metric | L1-icache-load-misses | Integer | 23734 | 5.8 | intel_pmu | Level 1 cache for instructions (L1i) read misses by a CPU core | jevents from pmu-tools | yes | Dependent on jevents library to read the metric value | |
| PMU | Metric | L1-icache-prefetches | Integer | 23734 | 5.8 | intel_pmu | Level 1 cache for instructions (L1i) prefetch accesses by a CPU core | jevents from pmu-tools | yes | Dependent on jevents library to read the metric value | |
| PMU | Metric | L1-icache-prefetch-misses | Integer | 23734 | 5.8 | intel_pmu | Level 1 cache for instructions (L1i) prefetch misses by a CPU core | jevents from pmu-tools | yes | Dependent on jevents library to read the metric value | |
| PMU | Metric | LLC-loads | Integer | 23734 | 5.8 | intel_pmu | Last level cache (LLC) read accesses by a CPU core | jevents from pmu-tools | yes | Dependent on jevents library to read the metric value | |
| PMU | Metric | LLC-load-misses | Integer | 23734 | 5.8 | intel_pmu | Last level cache (LLC) read misses by a CPU core | jevents from pmu-tools | yes | Dependent on jevents library to read the metric value | |
| PMU | Metric | LLC-stores | Integer | 23734 | 5.8 | intel_pmu | Last level cache (LLC) writes by a CPU core | jevents from pmu-tools | yes | Dependent on jevents library to read the metric value | |
| PMU | Metric | LLC-store-misses | Integer | 23734 | 5.8 | intel_pmu | Last level cache (LLC) write misses by a CPU core | jevents from pmu-tools | yes | Dependent on jevents library to read the metric value | |
| PMU | Metric | LLC-prefetches | Integer | 23734 | 5.8 | intel_pmu | Last level cache (LLC) prefetch accesses by a CPU core | jevents from pmu-tools | yes | Dependent on jevents library to read the metric value | |
| PMU | Metric | LLC-prefetch-misses | Integer | 23734 | 5.8 | intel_pmu | Last level cache (LLC) prefetch misses by a CPU core | jevents from pmu-tools | yes | Dependent on jevents library to read the metric value | |
| PMU | Metric | dTLB-loads | Integer | 23734 | 5.8 | intel_pmu | Translation lookaside buffer for data (dTLB) read accesses by a CPU core | jevents from pmu-tools | yes | Dependent on jevents library to read the metric value | |
| PMU | Metric | dTLB-load-misses | Integer | 23734 | 5.8 | intel_pmu | Translation lookaside buffer for data (dTLB) read misses by a CPU core | jevents from pmu-tools | yes | Dependent on jevents library to read the metric value | |
| PMU | Metric | dTLB-stores | Integer | 23734 | 5.8 | intel_pmu | Translation lookaside buffer for data (dTLB) writes by a CPU core | jevents from pmu-tools | yes | Dependent on jevents library to read the metric value | |
| PMU | Metric | dTLB-store-misses | Integer | 23734 | 5.8 | intel_pmu | Translation lookaside buffer for data (dTLB) write misses by a CPU core | jevents from pmu-tools | yes | Dependent on jevents library to read the metric value | |
| PMU | Metric | dTLB-prefetches | Integer | 23734 | 5.8 | intel_pmu | Translation lookaside buffer for data (dTLB) prefetch accesses by a CPU core | jevents from pmu-tools | yes | Dependent on jevents library to read the metric value | |
| PMU | Metric | dTLB-prefetch-misses | Integer | 23734 | 5.8 | intel_pmu | Translation lookaside buffer for data (dTLB) prefetch misses by a CPU core | jevents from pmu-tools | yes | Dependent on jevents library to read the metric value | |
| PMU | Metric | iTLB-loads | Integer | 23734 | 5.8 | intel_pmu | Translation lookaside buffer for instructions (iTLB) read accesses by a CPU core | jevents from pmu-tools | yes | Dependent on jevents library to read the metric value | |
| PMU | Metric | iTLB-load-misses | Integer | 23734 | 5.8 | intel_pmu | Translation lookaside buffer for instructions (iTLB) read misses by a CPU core | jevents from pmu-tools | yes | Dependent on jevents library to read the metric value | |
| PMU | Metric | branch-loads | Integer | 23734 | 5.8 | intel_pmu | Branch prediction unit read accesses by a CPU core | jevents from pmu-tools | yes | Dependent on jevents library to read the metric value | |
| PMU | Metric | branch-load-misses | Integer | 23734 | 5.8 | intel_pmu | Branch prediction unit read misses by a CPU core | jevents from pmu-tools | yes | Dependent on jevents library to read the metric value | |
| PMU | Metric | cpu-cycles | Integer | 23734 | 5.8 | intel_pmu | Total CPU cycles by a CPU core | jevents from pmu-tools | yes | Dependent on jevents library to read the metric value | |
| PMU | Metric | instructions | Integer | 23734 | 5.8 | intel_pmu | Retired instructions by a CPU core | jevents from pmu-tools | Note: these can be affected by various issues, most notably hardware interrupt counts. | yes | Dependent on jevents library to read the metric value |
| PMU | Metric | cache-references | Integer | 23734 | 5.8 | intel_pmu | Cache accesses per CPU core. Usually this indicates Last Level Cache accesses but this may vary depending on CPU type. | jevents from pmu-tools | yes | Dependent on jevents library to read the metric value | |
| PMU | Metric | cache-misses | Integer | 23734 | 5.8 | intel_pmu | Cache read misses by a CPU core. Usually this indicates Last Level Cache misses. | jevents from pmu-tools | yes | Dependent on jevents library to read the metric value | |
| PMU | Metric | branches | Integer | 23734 | 5.8 | intel_pmu | Retired branch instructions by a CPU core | jevents from pmu-tools | yes | Dependent on jevents library to read the metric value | |
| PMU | Metric | branch-misses | Integer | 23734 | 5.8 | intel_pmu | Mispredicted branch instructions by a CPU core | jevents from pmu-tools | yes | Dependent on jevents library to read the metric value | |
| PMU | Metric | bus-cycles | Integer | 23734 | 5.8 | intel_pmu | Bus cycles per CPU core, which can be different from total cycles. | jevents from pmu-tools | yes | Dependent on jevents library to read the metric value | |
| PMU | Metric | cpu-clock | Integer | 23734 | 5.8 | intel_pmu | Reports the CPU clock, a high-resolution per-CPU timer, by a CPU core. Software event provided by the kernel. | jevents from pmu-tools | yes | Dependent on jevents library to read the metric value | |
| PMU | Metric | task-clock | Integer | 23734 | 5.8 | intel_pmu | Reports a clock count specific to the task that is running, by a CPU core. Software event provided by the kernel. | jevents from pmu-tools | yes | Dependent on jevents library to read the metric value | |
| PMU | Metric | context-switches | Integer | 23734 | 5.8 | intel_pmu | Number of context switches per CPU core. Software event provided by the kernel. | jevents from pmu-tools | yes | Dependent on jevents library to read the metric value | |
| PMU | Metric | cpu-migrations | Integer | 23734 | 5.8 | intel_pmu | Number of times the process has migrated to a new CPU, by a CPU core. Software event provided by the kernel. | jevents from pmu-tools | yes | Dependent on jevents library to read the metric value | |
| PMU | Metric | page-faults | Integer | 23734 | 5.8 | intel_pmu | Number of page faults by a CPU core. Software event provided by the kernel. | jevents from pmu-tools | yes | Dependent on jevents library to read the metric value | |
| PMU | Metric | minor-faults | Integer | 23734 | 5.8 | intel_pmu | Number of minor page faults by a CPU core. Software event provided by the kernel. | jevents from pmu-tools | yes | Dependent on jevents library to read the metric value | |
| PMU | Metric | major-faults | Integer | 23734 | 5.8 | intel_pmu | Number of major page faults by a CPU core. Software event provided by the kernel. | jevents from pmu-tools | yes | Dependent on jevents library to read the metric value | |
| PMU | Metric | alignment-faults | Integer | 23734 | 5.8 | intel_pmu | Number of alignment faults by a CPU core. These happen when unaligned memory accesses happen. Software event provided by the kernel. | jevents from pmu-tools | yes | Dependent on jevents library to read the metric value | |
| PMU | Metric | emulation-faults | Integer | 23734 | 5.8 | intel_pmu | Number of emulation faults by a CPU core. The kernel sometimes traps on unimplemented instructions and emulates them for user space. Software event provided by the kernel. | jevents from pmu-tools | yes | Dependent on jevents library to read the metric value | |
| PMU | Input | Cores | Integer Array as String | "[0-12]" or "1,2,3" | 5.8.1 | intel_pmu | The list of CPU core(s) to be provided as input by the user for which the corresponding metrics are required | None | None | Configuration input in the plugin .conf file | |
| PMU | Input | Configuration Interval | Integer | 1 or 10 | 5.8 | intel_pmu | The interval in seconds at which the metrics need to be collectd | None | None | Configuration input in the plugin .conf file | |
| PMU | Input | Report Hardware Cache Events | Boolean | true/false | 5.8 | intel_pmu | Report hardware CPU cache events, list in comments | None | None | L1-dcache-loads, L1-dcache-load-misses, L1-dcache-stores, L1-dcache-store-misses, L1-dcache-prefetches, L1-dcache-prefetch-misses, L1-icache-loads, L1-icache-load-misses, L1-icache-prefetches, L1-icache-prefetch-misses, LLC-loads, LLC-load-misses, LLC-stores, LLC-store-misses, LLC-prefetches, LLC-prefetch-misses, dTLB-loads, dTLB-load-misses, dTLB-stores, dTLB-store-misses, dTLB-prefetches, dTLB-prefetch-misses, iTLB-loads, iTLB-load-misses, branch-loads, branch-load-misses | |
| PMU | Input | Report Kernel PMU Events | Boolean | true/false | 5.8 | intel_pmu | Report generalized hardware CPU events. Not all of these are available on all platforms. List in comments. | None | None | cpu-cycles, instructions, cache-references, cache-misses, branches, branch-misses, bus-cycles | |
| PMU | Input | Report Software Events | Boolean | true/false | 5.8 | intel_pmu | Software events provided by the kernel. List in comments. | None | None | cpu-clock, task-clock, context-switches, cpu-migrations, page-faults, minor-faults, major-faults, alignment-faults, emulation-faults | |
| PMU | Input | Event List | String | "pmu-events/GenuineIntel-6-55-core.json" | 5.8 | intel_pmu | Path to file with custom hardware events. The should containt description and definition for events available for given CPU type. | None | File should be valid for supported CPU type. | Valid file for current CPU type can be obtained with use of event_download tool: https://raw.githubusercontent.com/andikleen/pmu-tools/master/event_download.py | |
| PMU | Input | Hardware Events | String Array | L2_RQSTS.CODE_RD_HIT,L2_RQSTS.CODE_RD_MISS | 5.8 | intel_pmu | Custom hardware events for given CPU type. Names of events must be available in "Event List" json file. | event_download.py tool | No | If there are more events than counters, the kernel uses time multiplexing. With multiplexing, at the end of the run, the counter is scaled basing on total time enabled vs time running. |
Sub-sections:
Intel PMU Performance considerations